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CMC Announces Availability of Business Intelligence Reports
Enhancing your
economic and industrial landscape intelligence and supporting your research,
commercial, collaborative, and proposal activities.
Business & Technology
Reports:
CMC Microsystems links people and technology to stimulate R&D and economic opportunities where
advantage is gained from integrated Microsystems. To achieve this, sectors,
technologies, and supply chains are examined.
You may find the Business
& Technology Reports useful if you:
- want to strengthen arguments in your research proposals
- are looking for an industrial collaborator
- are looking for a supplier
- want to do some marketing for your product or new start-up
- want to know more about our economy
More..
Access to this offering requires a Basic Subscription. For more information or to subscribe visit www.cmc.ca
Advanced Photonic
Systems Lab (APSL) at Queen's University
CMC Microsystems
is pleased to
announce the addition of testing resources for Si-photonics chips
incorporating
vertical optical grating couplers. This product enhancement
incorporates:
- A
complete Si-photonic test station, available for on-site or remote
accessible
use at the Advance Photonic Systems Laboratory
- A
user guide describing the use of the Si-photonic test station
- Access
to equipment loans of the positioner arms used in the Si-photonic
test
station, allowing researchers to implement the same test
configuration in
their home laboratories
To find out more about this
offering visit the
CMC Testing Collaboratory online at
http://www.cmc.ca/collaboratory/photonics_systems_lab.html
New University-based Fabrication Process
The UW‐MEMS Process is a research oriented, proof of concept,
multi‐user MEMS fabrication process. It has been developed at the Center
of Integrated RF Engineering (CIRFE) at the University of Waterloo.
This eight mask layers, gold based surface micro‐machining process and
has been used successfully to build several MEMS devices. The UW‐MEMS
Process is being offered by CMC on a trial basis to Canadian academic
research community.
To learn more about this process or sign up as a lead client visit the CMC Competition page.
http://www.cmc.ca/products/competitions.htm
Sensonit Glass Based Microfulidic Technology
CMC Microsystems is please to offer the following fabrication process in our upcoming competition.
Technology highlights:
1. Various depth of microfluidic channel on glass: 5um to 60um generally, can be shallower or
deeper
2. Dual plane in-channel electrode metallization (ITO and
Ta-Au in channel electrode)
3. Bottom side Cr-Ni-Au metallization for integration of
CMOS chip using flip-chip bonding technology
Application
deadline: May 10th, 2010
Design submission:
July 28th, 2010
Chip delivered:
Oct 27th, 2010
For more detailed information, please contact:
Zhao Lu, zhao.lu@cmc.ca 613-530 4791
Training Reminders
Xilinx
The Xilinx University Program will be presenting
Professor Workshops at the University of Toronto and University of Alberta that
will provide hands-on training for Embedded Systems Design using Xilinx FPGAs:
University of Toronto:
- Embedded Linux on MicroBlaze:May
10-11, 2010
University of Alberta:
- Embedded Design with Xilinx FPGAs: May
29-30, 2010
Registration is free and spaces are limited. Course
details and registration can be accessed at the Xilinx University Program web
site (individuals must be members of the XUP to register):
http://www.xilinx.com/univ/uwkshp.htm
Cadence RF System-in-Package
The RF SiP implementation methodology provides a
new packaging platform with the advantages of high flexibility,
lower cost, and faster cycle time than SoC implementations. SiP
technology enables integration of digital and logic ICs, RF ICs,
and passives into a single package in a cost-effective process.
http://www3.cmc.ca/en/training/Cadence.aspx
CMC
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