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Monthly Bulletin

April 2010

CMC Microsystems provides training and support for Canadian Researchers that helps them transition to Industry.

 Microsystems are integral to Canada's ability to deliver and gain economic advantages. In the global context, competition in this area is increasingly aggressive requiring strategic investment in microsystems research and development so that Canadian companies can compete successfully in global markets. Continued support of microsystems research and training of Highly Qualified People will benefit not only the Canadian economy, but also individual Canadians by promoting job growth in a variety of globally relevant sectors. Technologies that improve healthcare diagnostics, energy efficiency, environmental monitoring, and both rural and urban infrastructure will deliver improved living standards for all citizens.

DALSA Semiconductor benefits from student's trained using services from CMC Microsystems  

More...

  IN THIS ISSUE 


Competitions

New- Business Intelligence Reports

New Test Functionality

New University-based Fabrication process

Microfluidics 

Training

News/Events

Get a CMC Account

Competitions

 Open Competitions

Agilent EEsof Tools for Research
AP1000 FPGA Development Board
Flip-chip attachment
Encapsulation
Hermetic sealing and selective encapsulation
Vacuum packaging
Carrier Platform for Microfluidic Research
MNT Financial Assitance

LETI Silicon Photonics Fabrication Resource Competition

Lead Client - UW MEMS

Upcoming Competitions

Compact Wireless Microsystem

For more information on our open competitions or to apply, please visit our Competition Homepage.

 Fabrication Deadlines

Request for Manufacturing Resources (RFMR) Deadlines due May 10, 2010:

  • 1001CR 90-nanometre CMOS (TSMC)
  • 1003CG 0.13-micron CMOS
  • 1003CM 0.35-micron CMOS (TSMC)
  • 1002CO 0.5-micron CMOS
  • 1003MO SOIMUMPS
  • 1002FS Sensonit

Design Submission Deadlines:

  • 1002CG 0.13-micron CMOS; May 5, 2010

Fabrication procedures and forms.

News and Events 

Events

  • Hands-on Interdisciplinary Course on Micro- and Nano-biotechnologies; McGill University,

    May 3-7, 2010 More...

  • CMC Researcher Workshop on Power Sources for Sensor Networks; Toronto, May 7, 2010 More...
  • Cadence RF System-in-Package Training More...
  • CMOS Emerging Technologies; May 19-21, 2010 More...

  Sign up for a CMC Account

Join the many faculty members and graduate students who benefit from products and services offered by CMC.


Apply online.


 


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CMC Microsystems Research Network Group now on Linkedin. Follow the discussion here.

 

CMC Announces Availability of Business Intelligence Reports

Enhancing your economic and industrial landscape intelligence and supporting your research, commercial, collaborative, and proposal activities.

Business & Technology Reports:

CMC Microsystems links people and technology to stimulate R&D and economic opportunities where advantage is gained from integrated Microsystems. To achieve this, sectors, technologies, and supply chains are examined.

You may find the Business & Technology Reports useful if you:

  • want to strengthen arguments in your research proposals
  • are looking for an industrial collaborator
  • are looking for a supplier
  • want to do some marketing for your product or new start-up
  • want to know more about our economy

  More..

Access to this offering requires a Basic Subscription.  For more information or to subscribe visit www.cmc.ca

Advanced Photonic Systems Lab (APSL) at Queen's University

CMC Microsystems is pleased to announce the addition of testing resources for Si-photonics chips incorporating vertical optical grating couplers.  This product enhancement incorporates:

  • A complete Si-photonic test station, available for on-site or remote accessible use at the Advance Photonic Systems Laboratory  
  • A user guide describing the use of the Si-photonic test station
  • Access to equipment loans of the positioner arms used in the Si-photonic test station, allowing researchers to implement the same test configuration in their home laboratories

To find out more about this offering visit the CMC Testing Collaboratory online at
http://www.cmc.ca/collaboratory/photonics_systems_lab.html

New University-based Fabrication Process

The UW‐MEMS Process is a research oriented, proof of concept, multi‐user MEMS fabrication process. It has been developed at the Center of Integrated RF Engineering (CIRFE) at the University of Waterloo. This eight mask layers, gold based surface micro‐machining process and has been used successfully to build several MEMS devices. The UW‐MEMS Process is being offered by CMC on a trial basis to Canadian academic research community.

To learn more about this process or sign up as a lead client visit the CMC Competition page.

http://www.cmc.ca/products/competitions.htm

Sensonit Glass Based Microfulidic Technology

CMC Microsystems is please to offer the following fabrication process in our upcoming competition.

Technology highlights:

1. Various depth of microfluidic channel on glass:  5um to 60um generally, can be shallower or deeper

2. Dual plane in-channel electrode metallization (ITO and Ta-Au in channel electrode)

3. Bottom side Cr-Ni-Au metallization for integration of CMOS chip using flip-chip bonding technology

Application deadline:  May 10th, 2010

Design submission: July 28th, 2010

Chip delivered: Oct 27th, 2010

For more detailed information, please contact:

 Zhao Lu, zhao.lu@cmc.ca 613-530 4791


  Training Reminders

 Xilinx

The Xilinx University Program will be presenting Professor Workshops at the University of Toronto and University of Alberta that will provide hands-on training for Embedded Systems Design using Xilinx FPGAs:


University of Toronto:

  • Embedded Linux on MicroBlaze:May 10-11, 2010

University of Alberta:

  • Embedded Design with Xilinx FPGAs: May 29-30, 2010

Registration is free and spaces are limited. Course details and registration can be accessed at the Xilinx University Program web site (individuals must be members of the XUP to register):

http://www.xilinx.com/univ/uwkshp.htm

Cadence RF System-in-Package

The RF SiP implementation methodology provides a new packaging platform with the advantages of high flexibility, lower cost, and faster cycle time than SoC implementations. SiP technology enables integration of digital and logic ICs, RF ICs, and passives into a single package in a cost-effective process.

http://www3.cmc.ca/en/training/Cadence.aspx

 


 

CMC Subscriptions connect you with information, tools, services and price discounts not otherwise available - adding value to microsystems R&D. More...

 

 

 

 

 

 

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