Competitions
Open Competitions
- Agilent ADS (Teaching and Research Licenses)
- AP1000 Development Boards
- Nanofabrication
- Carrier Platform for Microfluidics Research
- Flip chip attachment
- Encapsulation
- Hermetic sealing and selective encapsulatio
- Vacuum packaging
- Integrating a pixel-based camera system or an energy-based optical detection system into your project
For more information on our open competitions or to apply, please visit our Competition Homepage.
Upcoming Competitions
- Compact Wireless Platform
- Cadence RF System in-Package (SIP)
Fabrication Deadlines
Request for Manufacturing Resources (RFMR) Deadlines:
- 1001PA InP Based Technology; February 4, 2010
- 1001PB GaAs Based Technology; February 4, 2010
- 100PD Silicon on Insulator Technology (CPFC); February 4, 2010
- 1001PF Silicon on Insulator Technology (IMEC);February 4, 2010
- 1002CG .13-micron CMOS; February 10, 2010
- 1001CH .08-micron CMOS; February 10, 2010
- 1001MH .08-micron CMOS; February 10, 2010
- 1001CJ .08-micron CMOS; February 10, 2010
- 1001MJ .08-micron CMOS; February 10, 2010
- 1001CK .08-micron CMOS; February 10, 2010
- 1001MK .08-micron CMOS; February 10, 2010
Design Submission Deadlines:
- 0901CR 90-nanometer CMOS (TSMC); January 27, 2010
- 1001CG .13-micron CMOS; February 10, 2010
- 1001CM .35-micron CMOS (AMS) Standard/OPTO process only; January 27, 2010
- 1002CM .35-micron CMOS (AMS) HV Option only; February 3, 2010
- 1001QA 2.5GHz BiPolar Linear Array; February 15, 2010
- 1001CF .18-micron CMOS; February 17, 2010
Fabrication procedures and forms.
News and Events
Events
- Photonics West; January 23-28, 2010 More...
- Agilent ADS Product Overview (Online); January 26,2010 Contact us.
- Wearable Wireless Devices for Bio-Medical Applications; February 5, 2010 More...
- Designing for Photonics Fabrication; Montreal, QC February 9, 2010 Contact us
- Designing for Photonics Fabrication; Vancouver, BC March 8, 2010 Contact us
- Designing for Photonics Fabrication; Edmonton, AB March 9, 2010 Contact us
- CMOS Emerging Technologies; May 19-21, 2010 More...
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CMC Microsystems Research Network Group now on Linkedin. Follow the discussion here.
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Featured Application Notes
Prepared by Patricia Greig, Photonics Collaboratory Engineer, CMC Microsystems.
Prepared by Leonid Belostotski, Assistant Professor, Electrical and Computer Engineering, University of Calgary.
Prepared by Dr. Susan Xu, Senior Engineer, CMC Microsystems.
Prepared by Dong An (Hudson), Mixed-Signal Collaboratory Engineer, CMC Microsystems.
Prepared by Mariusz E. Jarosz, Test and Packaging Engineer, CMC Microsystems
Prepared by Dong An (Hudson), Mixed-Signal Collaboratory Engineer, CMC Microsystems.
This application note describes how to use a Matlab based GUI to simulate thermal actuators, which
can be built by any of the three technologies offered by CMC
Microsystems; PolyMUMPs, MetalMUMPs and SOIMUMPs as well as any custom
microfabrication process.
More...
Ethernet IP and Reference Design
CMC is offering to researchers
an Intellectual Property (IP) and Reference Design product set that
enables development of networking-based embedded systems
designs/applications using commercial, pre-validated source code IP.
Benefits of using this package include accelerated development of
networking applications by using pre-validated IP (further accelerated
by a working reference design) and enhanced student training through
working examples and exposure to commercial IP (as source code).
Included in this package are:
-
Gigabit Ethernet (GBE) Media Access Controller (MAC) core:
developed by AMIRIX Systems Inc., this core includes full HDL (Verilog)
source code and Linux drivers that create an interface between a PHY
networking device and the IBM CoreConnect Processor Local Bus (PLB). It
is optimized for use in a processor-based system and uses Direct Memory
Access (DMA) for improved performance. With access to full source code,
users may utilize this core as-is or modify it.
-
GBE Reference Design:
targeting the AMIRIX AP1000 FPGA Development Board, this reference
design demonstrates use of the AMIRIX GBE core through a working
application.
-
GBE Reference Design User Guide:
a CMC-developed document describes the GBE core and reference design,
and walks the user through installation, setup and execution of the
reference design.
-
GBE Managament Interface (MIF) core:
a subcomponent of the GBE core, the MIF lies between a PHY device and a
local application, allowing the application to access the register set
of a PHY device.
-
E-mail Trigger IP and Reference Design:
An IP and Reference Design that allows internal monitoring of a
FPGA-based system. The trigger module is activated by a hardware
stimulus; upon receiving a trigger condition, the module will sample up
to 64 design points and send an email message from the FPGA board.
More...
Agilent EEsof EDA Design and Simulation Software
Agilent EEsof EDA is the supplier of
Electronic Design Automation (EDA) software for high-frequency system, circuit,
and modeling applications. The following products are available to university
clients:
Advanced
Design System (ADS)
Electronic design automation software
platform offering complete design integration for products such as cellular and
portable phones, wireless networks, and radar and satellite communications
systems.
Electromagnetic
Professional (EMPro)
The industry's first 3D EM platform that
completely integrates 3D EM simulation and the ADS design environment. The new
and modern architecture offers unparalleled intuitiveness and removes the
expense and overhead of maintaining disconnected tools.
Genesys
RF and Microwave Design Software
Agilent Genesys provides self-supporting
RF Board engineers affordable, practical design tools for RF component design
to complete transceiver design including multi-element antenna arrays.
GoldenGate
RFIC Simulation Software
Advanced simulation and analysis
solution for integrated mixed signal RFIC designs. GoldenGate software is fully
integrated into the Cadence Analog Design Environment (ADE).
IC-CAP
Device Modeling Software
Complete device modeling solution for
semiconductor modeling processes.
SystemVue
ESL Software
EDA environment for electronic
system-level (ESL) design that allows system architects and algorithm
developers to innovate the physical layer (PHY) of next-generation wireless and
aerospace/defense communications systems.
For detailed information on each
product, please refer to Agilent EEsof webpage.
Licensing:
For Agilent CAD licensing, please
contact licensing@cmc.ca.
Product
Access:
Agilent CAD tools can be downloaded
directly through Agilent website www.agilent.com/find/eesof.
After selecting a product, please refer to download and installation
instructions under the 'Download and Trial' tab.
Discussion
Forums, Demos, Manuals, FAQ, Application Notes, Training Events, More...
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